Semiconductor Glossary, Developed Semi OneSource.

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With over 2000 terms defined and explained, Semiconductor Glossary is the most complete reference in the field of semiconductors on the market today.

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Term (Index) Definition
planarization  process of flatting of the surface of the wafer; done either by deposition of additional material and back polishing it, or by deposition and re-flowing of SiO2 doped with P and B (BPSG), or by depositing thick layer of resist.
BPSG  boro-phospho-silicate glass; silicon dioxide (silica) with boron and phosphorus added to lower temperature at which glass (oxide) starts to flow from about 950 oC for pure SiO2 to about 500 oC for BPSG; used to planarize the surface; deposited by CVD.
CMP  Chemical Mechanical Polishing, Chemical Mechanical Planarization, method of removing layers of solid by chemical-mechanical polishing carried out for the purpose of surface planarization and definition of metal interconnect pattern; key process in back-end of line IC manufacturing.
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Information in this glossary is provided at the author's discretion. Any liability based on, or related to the contents of this glossary is disclaimed.