Semiconductor Glossary, Developed Semi OneSource.

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With over 2000 terms defined and explained, Semiconductor Glossary is the most complete reference in the field of semiconductors on the market today.


Including some 500 new terms defined and remaining terms updated and modified, a 2nd edition book version of this glossary is now available.

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Term (Index) Definition
gate capacitance  for MOSFET/CMOS to operate properly MOS gate stack must feature certain minimum capacitance C~kA/d; as gate contact area A decreases due to scaling, thickness of gate dielectric d must decrease to maintain desired capacitance of the stack; when reduction of gate dielectric thickness is not possible due to the excessive tunneling current dielectric featuring dielectric constant k higher than SiOsub>2 must be used.
alternative dielectrics  dielectrics featuring dielectric constant k > 3.9 (3.9 is a dielectric constant of SiO2)and acting as gate oxides in silicon MOS devices instead of SiO2; referred to as "high-k dielectrics"; also dielectrics featuring dielectric constant k < 3.9 and used as ILD; referred to as "low-k dielectrics".
high-k dielectric  dielectric material featuring dielectric constant k higher than 3.9 which is k of SiO2; used as gate dielectric (amorphous) in MOS devices and in storage capacitors; high k increases capacitance, or keeps in unchanged at the reduced area of MOS gate and gate dielectric sufficiently thick to prevent excessive tunneling current.

Reference: See Semiconductor Notes for more information
tunneling, tunneling current  transport of electron across the potential barrier without changing its energy; as opposed to electron transport "over" the barrier (thermionic emission) in which case its energy is must be changed; tunneling probability is a strong function of the width ofpotential barrier; examples: tunneling across the potential barrier at the metal-semiconductor contact, or across the potential barrier at the p-n junction, or across an oxide (direct tunneling for oxide thinner than about 3 nm, Fowler-Nordheim tunneling for oxide 5-10 nm thick) in MOS structure.
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Jerzy Ruzyllo is a Distinguished Professor Emeritus in the Department of Electrical Engineering at Penn State University.

This book gives a complete account of semiconductor engineering covering semiconductor properties, semiconductor materials, semiconductor devices and their uses, process technology, fabrication processes, and semiconductor materials and process characterization.

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Created and operated by J. Ruzyllo. Copyright J. Ruzyllo 2001-2016. All rights reserved.

Information in this glossary is provided at the author's discretion. Any liability based on, or related to the contents of this glossary is disclaimed.