|
Semiconductor Glossary book, click here to see new prices!
With over 2000 terms defined and explained, Semiconductor Glossary is the most complete reference in the field of semiconductors on the market today.
|
Including some 500 new terms defined and remaining terms updated and modified, a 2nd edition book version of this glossary is now available.
|
|
Term (Index)
|
Definition
|
drain extension
|
low doping extension of source and drain toward channel; carried out by ion implantation; used in advanced CMOS to prevent premature breakdown of drain-substrate junction.
|
drain engineering
|
modifications of the drain and channel region adjacent to the drain in integrated MOS and CMOS devices; goal is to improve characteristics of MOS transistors with ultra-short channel.
|
|
Term (Index)
|
Definition
|
elevated drain
|
drain region in MOSFET/CMOS is extended above the surface of the wafer by means of selective epitaxy; needed in ultra-short channel MOSFETs where drain region must beextremely shallow (as thin as about 30 nm); e.g. in ultra-thin SOI CMOS devices; same concept as raised drain.
|
drain
|
heavily doped region in semiconductor substrates located at the end of the channel in Field Effect Transistors; carriers are flowing out of the transistor through the drain.
|
drain engineering
|
modifications of the drain and channel region adjacent to the drain in integrated MOS and CMOS devices; goal is to improve characteristics of MOS transistors with ultra-short channel.
|
elevated source
|
source region in MOSFET/CMOS is extended above the surface of the wafer by means of selective epitaxy; needed in ultra-short channel MOSFETs where source region must be extremely shallow (less than about 30 nm); e.g. in ultra-thin SOI CMOS devices.
|
|
Term (Index)
|
Definition
|
elevated drain
|
drain region in MOSFET/CMOS is extended above the surface of the wafer by means of selective epitaxy; needed in ultra-short channel MOSFETs where drain region must be extremely shallow (less than about 30 nm); e.g. in ultra-thin SOI CMOS devices.
|
drain
|
heavily doped region in semiconductor substrates located at the end of the channel in Field Effect Transistors; carriers are flowing out of the transistor through the drain.
|
drain engineering
|
modifications of the drain and channel region adjacent to the drain in integrated MOS and CMOS devices; goal is to improve characteristics of MOS transistors with ultra-short channel.
|
elevated source
|
source region in MOSFET/CMOS is extended above the surface of the wafer by means of selective epitaxy; needed in ultra-short channel MOSFETs where source region must be extremely shallow (less than about 30 nm); e.g. in ultra-thin SOI CMOS devices.
|
|
Term (Index)
|
Definition
|
lightly doped drain, LDD
|
reduced doping of the drain region in veru small geometry MOS/CMOS transistor; part of the drain engineering strategy in advanced CMOS; designed to control drain-substarte breakdown; the reduced doping gradient between drain and channel lowers electric field in the channel in the vicinity of the drain; implementation: moderate implant before spacer formation, heavy implant after spacer formation.
|
drain
|
heavily doped region in semiconductor substrates located at the end of the channel in Field Effect Transistors; carriers are flowing out of the transistor through the drain.
|
drain engineering
|
modifications of the drain and channel region adjacent to the drain in integrated MOS and CMOS devices; goal is to improve characteristics of MOS transistors with ultra-short channel.
|
drain extension
|
low doping extension of source and drain toward channel; carried out by ion implantation; used in advanced CMOS to prevent premature breakdown of drain-substrate junction.
|
|
|
|
Jerzy Ruzyllo is a Distinguished Professor Emeritus in the Department of Electrical Engineering at Penn State University.
This book gives a complete account of semiconductor engineering covering semiconductor properties, semiconductor materials, semiconductor devices and their uses, process technology, fabrication processes, and semiconductor materials and process characterization.
|