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Sunday, March 13, 2016

#339 Surface "aging"

Surface contaminants encountered in semiconductor manufacturing can be  added to the surface during wafer processing and  during wafer storage. The latter concerns contaminants from the storage and shipping ambient including clean room air, containers, boxes, and cassettes. Assuming storage is taking place in a particle-free environment the contaminants originating from storage include primarily organic compounds and moisture.


Prolonged exposure to the ambient air during wafer storage results in the surface “aging” process which may interfere with subsequent processes or measurements such as ellipsometric measurements. See Fig. 3 in this paper for the illustration of the dynamics of silicon surface "aging" process as represented by the changes in the value of contact angle as a function of wafers storage time. 


Posted by Jerzy Ruzyllo at 08:13 AM | Semiconductors | Link

Sunday, March 6, 2016

#338 Effect of hydrogen on silicon's electrical conductivity

Questions regarding interactions between alien elements (other than purposly introduced dopants) and electronic properties of semiconductors continue to be relevant. So, it addition to what was already said in this blog two years ago (see post #281), here is a reference that considers a mechanism according to which hydrogen penetrating silicon  may alter its electrical conductivity.

Posted by Jerzy Ruzyllo at 07:29 PM | Semiconductors | Link

Sunday, February 21, 2016

#337 Vertical Slit FET, VeSFET

Among transistor architecures offering possible solutions to the future low-power, high-denisty and highly reconfigurable logic and memory ICs, Vertical Slit FET, or VeSFETcontinues to intrigue me because (i) it offers alternative to transistor scaling solution to the challenges of ultra-low power digital ICs and (ii) it very efficiently integrates transistors in the circuit with multi-level metallization scheme. Not to mention its predicted by several simulations superior performance in terms of, for instance, Ion/Ioff ratio.


It will be interesting to see what will be chip manufacturers reaction to this highly innovative solution.

Posted by Jerzy Ruzyllo at 12:26 PM | Semiconductors | Link

Sunday, February 7, 2016

#336 Thick films

Since in the previous blog I attempted to define a concept of the “thin”-film, a brief comment on what “thick’-films are all about is in order. A film of a solid is referred to as “thick” when its basic physical properties (e.g. resistivity of the conductor) are not significantly different from the physical properties of the same material in the bulk form. Films referred to as thick are in the thickness range typically above 100 µm.


Key difference between thin- and thick-films is in the film deposition technology. While the former use precise methods such as physical vapor deposition (PVD) or chemical vapor deposition (CVD), formation of thick-films involves techniques such as screen printing.


Thick film are not used to make semiconductor devices, and hence, are not a part of broadly understood semiconductor device technology. Thick films are commonly used to make passive elements, mainly resistors, and in general, are an important part of the hybrid IC technology.  


Posted by Jerzy Ruzyllo at 05:40 PM | Semiconductors | Link

Sunday, January 24, 2016

#335 Thin films

Thin-films play key role in semiconductor technology not only as the semiconductor thin-films (consider Thin-Film Transistors and thin-film solar cells for instance), but also as thin-film insulators and thin-film conductors that are needed to build semiconductor devices. In essence the entire semiconductor device  engineering is based on thin-films.  Yet, the term thin-film seems to escape a formal definition.


To me the term thin-film refers to the material in the form of the film which is thin enough to display physical properties (e.g. resistivity) distinctly different from the physical properties of the same material in the bulk form or in the form of the thick-film (see the blog to follow). The difference results from the increasing two-dimensional confinement of charge carriers as the film gets thinner. Because materials used to build semiconductor devices display highly diverse physical properties, it is not possible to come up with a single thickness below which material acts as a thin-film. In general, however, in semiconductor terminology the term thin applies to the films thinner than about 0.5 µm (500 nm).

Posted by Jerzy Ruzyllo at 02:56 PM | Semiconductors | Link

Sunday, January 10, 2016

#334 Merger of electronics and photonics

Semiconductor material and device designs are selected in accord with the needs of either electronic or photonic functions. In the electronic case, the prime selection criteria include the width of the energy gap, the electron mobility, thermal conductivity, and certain “manufacturability” related properties. For photonic systems the key parameter is not only the width of the energy gap but also type of gap, either direct or indirect.


 In the past, electronic and photonic functions were performed separately by designated devices made out of either “electronic semiconductors” (e.g. Si), or “photonic semiconductors” (e.g. many of the III-V compounds). Currently, however, trend toward a merger of these two functions in a single material system is very obvious and irreversible. Whether in present-day imaging systems, in which display quality is critically dependent on the thin-film transistors (TFT) controlling each pixel, or in LEDs where the electrical signal enforces emission of light, or in solar cells where an electrical signal results from the absorption of sun light, or in future generations of integrated circuits where optical waveguides may one day replace electrical interconnect lines, electrons and photons are destined to interact ever more  closely within the same material system, or in the other words, within the same device or circuit.


Posted by Jerzy Ruzyllo at 07:35 PM | Semiconductors | Link

Sunday, December 13, 2015

#333 IEDM 2015

As usual in December (e.g. see blogs #312 and #266) comes the time to comment on the trends that have emerged from the papers presented during the annual International Electron Device Meeting (IEDM). The 2015 edition of IEDM was a memorable one because after 60 years of alternating between Washington, D.C. and San Francisco, starting in with 2016 edition, IEDM will be held solely in  the Bay Area.  


 To me, “3D” and “flexible” were on top of the list of keywords defining this year’s IEDM. The former was tossed around not only in the reference to transistors architecture (FinFETs specifically), but also in the context of 3D integration. The latter, was used mainly in reference to the flexible substrates in display technology, wearable electronics and photonics, etc. It seems to me that it won’t be long before the term “3D flexible” will emerge as a single key word.  


Posted by Jerzy Ruzyllo at 05:50 PM | Semiconductors | Link

Sunday, November 22, 2015

#332 III-Vs are not all the same

It appears that while referring to III-V semiconductor compounds we tend to see them as a homogeneous in terms of physical and chemical properties group of materials. We often compare elemental semiconductors (Si, Ge) with III-V semiconductors just as the latter would be a group of materials representing the same, or at least similar, basic characteristics. Well, it’s not exactly a case.


Consider for instance electron mobility and energy gap. Quite commonly we view III-Vs as the across the board high-electron mobility materials by saying for instance “high-electron mobility III-V channel materials”. Such statement is applicable to some III-V semiconductors, e.g. InSb featuring electron mobility of 80,000 cm2/V sec, but certainly is not applicable to some others such as GaN featuring 300 cm2/V electron mobility. The difference in the physical properties is further reflected in the drastic difference in the bandgap  which is definitely wide in the latter case (~3.4 eV), but very narrow in the former (0.18 eV).


From the chemical and electrochemical properties perspective the differences between various III-V semiconductors are equally pronounced. Let’s consider for instance major differences in oxidation potential, polarity and other material properties which in combination result in the drastically different etch characteristics displayed  by different III-V compounds.


The solution to this “III-V dilemma” seems to be increasingly common reference to the specific families of III-V compounds, namely arsenides (III-As), nitrides (III-N), phosphide (III-P) and antimonites (III-Sb) rather than to the entire class of III-V compounds.


Posted by Jerzy Ruzyllo at 10:56 AM | Semiconductors | Link

Sunday, October 25, 2015

#331 Devices: electronic and photonic

In electronic semiconductor devices electron acts as an information carrier and the change in the input electrical signal (voltage or current) drives changes in the output current. In the photonic devices, where photon is an information carrier there is an interplay between light (photons) and electric current (electrons): current in – light out defines operation of the Light Emitting Diode (LED) while the opposite, light in – current out is a foundation of the solar cell operation.


I don’t mean to promote an oversimplifying picture of semiconductor device engineering, but the above pretty much sums up what active semiconductor devices are all about.

Posted by Jerzy Ruzyllo at 05:54 PM | Semiconductors | Link

Sunday, September 6, 2015

#330 Porosity in semiconductor technology

The terms porosity refers to the material which includes significant volume of pores (voids) in its structure.  At the first glance, porosity does not seem to be a desired feature of materials used to make semiconductor devices.  The following two examples contradict this perceived notion and demonstrate how material’s porosity can be exploited in semiconductor device engineering.  


First example is concerned with low-k dielectrics used in multi-level metallization scheme in advance IC manufacturing. Here, nanopores (essentially air gaps)  included in the structure of an insulating dielectric lower its dielectric constant k and increase its ability to reduce capacitive coupling between adjacent metal lines.


Second example involves porous silicon (p-Si), i.e. silicon which includes large volume of pores in its structure.  With very little material remaining between the voids, silicon in porous form experiences pronounced geometrical confinement making it display quantum confinement effects. As a result, its fundamental physical characteristics are becoming very different from those displayed by the bulk Si. The most visible manifestation of the these differences is a wider energy gap of p-Si  which makes it emit visible red-orange light as opposed to invisible infra-red radiation generated by the narrower energy gap bulk Si. Also, very large surface to volume ratio of porous Si make bring about some innovative interesting applications for this “full of air” version of silicon.


Posted by Jerzy Ruzyllo at 02:22 PM | Semiconductors | Link

‹‹ ›› is the personal blog of Jerzy Ruzyllo. With over 35 years of experience in academic research and teaching in the area of semiconductor engineering (currently holding position of a Distinguished Professor of Electrical Engineering and Professor of Materials Science and Engineering at Penn State University), he has a unique perspective on the developments in this progress driving technical domain and enjoys blogging about it.

With over 2000 terms defined and explained, Semiconductor Glossary is the most complete reference in the field of semiconductors on the market today.

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