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Sunday, May 10, 2020

#431 Why organic contaminants are harmful in semiconductor technology?

Following on the earlier considerations of organic contaminants, let’s take a quick look at the ways they can interfere with semiconductor processing.

  

When allowed to agglomerate into particle-like colonies in the water delivery system, bacteria-based particles adsorbed on the exposed processed surfaces will have a harmful effect on the process just like any other particle in the semiconductor process environment.

 

Airborne volatile organics adsorbed on the processed surfaces in turn, if not removed prior to thin-film deposition on such surfaces, may lead to the major process malfunction. Prior to critical deposition steps such as for instance epitaxial deposition, organic contaminates will prevent high-quality film formation. Also, if not removed prior to the metal deposition, organic contaminants will results in the increased contact resistance.

 

Less obvious is a deleterious destabilizing effect of organic contaminants adsorbed on the wafers stored in between processing steps. What the terms “destabilizing effect” means, is that initially light organic compounds phsysisorbed of the surface are in the course of the prolonged exposure to the moisture containing ambient air chemically bonding to the surface changing its energy in the process. Such process is often referred to as “surface aging” and needs to be prevented, or strictly controlled in any semiconductor device manufacturing process.

Posted by Jerzy Ruzyllo at 07:40 PM | Semiconductors | Link


Sunday, May 3, 2020

#430 Viruses as organic "contaminants"

 Contaminants of concern in semiconductor processing include particles, metallic contaminants, and organic contaminants. The first are always of concern, the effect of metallic contaminants on the performance of the final device can be extremely damaging, or may be less harmful depending on the materials used, type of the process wafer's surface is subjected to, and temperature of the subsequent processe(s). Similarly to particles, organic contaminants need to be controlled at every stage of the device fabrication sequence as they destabilize semiconductor surfaces and may be responsible for the malfunction of the thin-film deposition processes, for instance.

  

The hydrocarbons airborne and outgassing from plastic containers used to handle, ship and store semiconductor wafers, as well as colonies of bacteria which may grow into a particle in some parts of the water delivery systems and then contaminate wafers, are of greatest concern with regard to organic contamination control in semiconductor manufacturing environment.

  

Isopropyl alcohol, IPA in short, and hydrogen peroxide (H2O2) are among most commonly used to remove bacteria and viruses from the surface of the objects we are touching in our daily lives, and from our skin. These are also solutions commonly used in semiconductor manufacturing to control organic contaminants. In addition, in order to prevent bacteria contamination, water used in semiconductor processing is strongly ozonated.

 

While the viruses as such may not directly affect/contaminate semiconductor surfaces, one thing is sure - there are no viruses either on the surface of semiconductor wafers processed in the course of semiconductor device fabrication, or in the water used in semiconductor processing. Wet benches used in semiconductor fabrication create a very viruses and bacteria unfriendly environment. As a result, no SARS-Cov-2 on the properly treated semiconductor surfaces and cleaning utensils during device manufacturing.

Posted by Jerzy Ruzyllo at 11:37 AM | Semiconductors | Link


Sunday, April 26, 2020

#429 Thirty years ago: April 1990

 As literature from exactly 30 years ago indicates, thirty years ago high-performance CMOS was getting into the territory of sub-quarter µm gate length (0.22 µm to be specific), and 3.5 nm gate oxide thickness. Literature further demonstrates (April issues of IEEE Transactions on Electron Devices and IEEE Electron Device Letters) strong focus on transistor technology in general. Weather it was field-effect MOSFET, MEST, MODFET, or bipolar HBT, the search for the innovative transistor solution for next generation digital circuitry was clearly on display.

 

Other than that, SOI technology, represented at that time by SIMOX substrates, was aggressively pursued. At the materials side, as papers in the April issue of the Journal of the Electrochemical Society indicate, the search for the gate dielectrics displaying higher k than SiO2 was gaining momentum. Except that it was focused on TiO2, Ta2O5, and zirconia (ZrO2) which later, as we now know, did not solve the problem high-k gate dielectric because of the insufficient thermal stability. 

Posted by Jerzy Ruzyllo at 03:18 PM | Semiconductors | Link


Sunday, April 19, 2020

#428 Semiconductor clean-rooms, virus protection, cleaning, cont.

Semiconductor clean-room apparel in general, including disposable and sterile clean-room garments, hoods, respirators, masks, gloves, shoes,  etc.,etc. are serving one purpose which is to protect pristinely clean environment from the particles generating people working in the clean-room. In other words, the goal is to protect the environment from us.

 

In the case of protection against viruses it is the other way around - the goal is to protect us against the contaminated environment. But the tools and means are exactly the same in these two cases.

 

Another example of semiconductor technology setting a tone for various virus-protection solutions is concerned with aggressively recently pursued use of UV light to clean surfaces and objects we touch in our daily lives. In semiconductor processing UV treatments of solid surfaces were explored (specifically for the purpose of organic contaminants removal) already over thirty years ago. See for instance this research paper: J. Ruzyllo, G, Duranko, and A, Hoff, "Pre-Oxidation UV Treatments of Silicon Wafers", Journal of the Electrochemical Society, vol. 134. p. 2052 (1987).

 

Posted by Jerzy Ruzyllo at 08:26 PM | Semiconductors | Link


Sunday, April 5, 2020

#427 Can semiconductor clean-rooms provide SARS-Cov-2-free environment?

When not interacting with the living cells aren’t the viruses behaving like independent particles? Aren’t then class sub-1 clean-rooms used in cutting edge semiconductor manufacturing creating a virus-free environment? At least SARS-Cov-2-free environment?

  

The size of the SARS-Cov-2 virus which is causing coronavirus disease wreaking incredible havoc around the world these days is apparently in the range of 120 nm while the advanced ULPA (Ultra Low Particulate Air) filters are removing from the air particles as small as 100 nm. Besides, air in the clean-rooms is continuously exchanged and ULPA filtered which further limits any potentially harmful interactions with viruses.

 

People working in semiconductor clean-room are wearing elaborate gowns to protect environment against particle generating people, no other way around. In the case of clean-rooms used for virus protection such a costly  gear wouldn’t be needed.

 

All in all, I think there is good chance clean-room technology will be spreading in the future well beyond semiconductor labs and fabs. 

Posted by Jerzy Ruzyllo at 08:51 PM | Semiconductors | Link


Sunday, March 29, 2020

#426 Thirty years ago: March 1990

Here are the themes that could be identified in some semiconductors related journal in March 1990. In the Journal of the Electrochemical Society etching appears to be one of the lead themes. Whether it was Reactive Ion Etching (RIE), or ion-milling, silicon or GaAs, etch processes were clearly at the forefront in this particular issue. It is in agreement with what I recall about those times. RIE, RIE-induced damage, and etch related surface contamination were of great interest then. 

 

As the name of the journal indicates, papers published in the IEEE Transactions on Electron Devices were geared more toward device-related phenomena. Exactly thirty years ago, much attention has been paid to the charge transport phenomena in both field-effect and bipolar devices, charge carrier trapping, etc. 

Posted by Jerzy Ruzyllo at 09:29 PM | Semiconductors | Link


Sunday, March 15, 2020

#425 My new book

The book I was working on during the last three years or so, is now available on the market. It is entitled “Guide to Semiconductor Engineering” and was published by the World Scientific Publishing Company. If interested, you may want to take a look at it here. I do my best to explain premises upon which this book was conceived in the video included. Also, consider exploring the Table of Contents to see a broad range of issues covered in this contribution.

 

Posted by Jerzy Ruzyllo at 09:16 AM | Semiconductors | Link


Sunday, March 8, 2020

#424 Thin-films

Thin-films are at the core of any semiconductor material systems in which properties of surfaces and interfaces discussed earlier are coming to play. There is a strong correlation between the thickness of any solid, including semiconductors, and its electronic properties. While gradually confining geometry of a solid from the three-dimensional bulk realm to the two-dimensional configuration, basic physical characteristics of material are changing. The changes will occur according to the laws of classical physics up to the point where at the extreme geometrical confinement quantum phenomena take over control of the behavior of electrons which are now subject to the laws of quantum physics.

 

So, how the concept of the “thin-film” can be defined? Considering resistivity of semiconductor for instance, it displays bulk characteristics as long as continued reduction of its thickness do not alter electrons motion in any of the three directions. At certain thickness, however, resistivity starts increasing as the increasing scattering of strongly 2D confined electrons alters the flow of electrons. This is a point at which material no longer displays bulk properties and assumes properties of a thin-film.  

 

Posted by Jerzy Ruzyllo at 11:14 AM | Semiconductors | Link


Sunday, February 23, 2020

#423 Thirty years ago: February 1990

Research papers published in February 1990 reflected on the anticipated at that time challenges facing semiconductor technology. In the case of the Journal of Electrochemical Society the issues related to the MOS gate oxide processing in the context of the continued scaling of its thickness are at the forefront. (Quick reminder, the gate oxide thickness was at that time in the range of 8-10 nm and the oxide was either pure or nitrided SiO2). Also of interest were challenges facing etch technology in the case of binary and ternary compound semiconductors material systems.

 

In the case of IEEE Electron Device Letters similar concerns are on full display, but at the device level. Hot-electron induced degradation in deep-submicrometer MOSFETs, as advanced MOSFETs were referred to at that time, was getting much attention.

 

The  February 1990 issue of the IEEE Transactions on Electron Devices was a special issue devoted enrtirely to Photovoltaic Materials, Devices, and Technologies. An observation: not much of what's going on in photovotaics now, was entirely unknown 30 years ago.

Posted by Jerzy Ruzyllo at 02:08 PM | Semiconductors | Link


Sunday, February 16, 2020

#422 Interface

Interfaces are the integral part of any material system comprised of two and more materials in which they typically play the role which defines characteristics of the entire system. As in the case of the surfaces (see previous blog), the effect of an interface between two materials expands into the adjacent regions. An interface is essentially a transition region featuring finite thickness that is needed to allow structural transition between two materials featuring different structure and/or chemical transition between two materials featuring different chemical composition. In either case, interface represents a discontinuity of electrical, optical, mechanical, and thermal properties of the material system.

 

From the point of view crystal structure interface is basically a planar defect severely disrupting integrity of the material system, and hence, altering its characteristics. And by the way, the impact of interface on semiconductor device performance manifest itself differently depending onwhether device current is flowing parallel to the interface or across the interface

 

Posted by Jerzy Ruzyllo at 05:45 PM | Semiconductors | Link


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Semi1source.com/blog is a personal blog of Jerzy Ruzyllo. He is Distinguished Professor Emeritus in the Department of Electrical Engineering at Penn State University. With over forty years' experience in academic research and teaching in semiconductor engineering he has a unique perspective on the developments in this technical domain and enjoys blogging about it.




This book gives a complete account of semiconductor engineering covering semiconductor properties, semiconductor materials, semiconductor devices and their uses, process technology, fabrication processes, and semiconductor materials and process characterization.



With over 2000 terms defined and explained, Semiconductor Glossary is the most complete reference in the field of semiconductors on the market today.



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