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Tuesday, December 31, 2013

#269 Semiconductor Surface Cleaning and Conditioning

 If you are interested in semiconductor surface cleaning and conditioning you may want to check a Focus Issue of ECS JSS devoted to this very topic. It is available on-line   and hard copy will follow this coming Spring. In the case you would be specifically interested in the status of gas-phase semiconductor cleaning technology you may consider reviewing my assessment of the progress in this area in this paper

Posted by Jerzy Ruzyllo at 12:30 PM | Semiconductors | Link

Sunday, December 15, 2013

#268 To scale or to go a different way?

Here is an interesting story related to my previous blog. It looks like the very benefits of transistor scaling down to low single digit nm gate length are questioned. Something that was bound to happen sooner or later finally came to haunt us - the cost rather than engineering is becoming a show stopper!

May be the time has come to consider a drastically different approach to transistor/circuit architecture as a problem solver? Such as for instance VeSFET/VeSTICs concept ? (see the blog#246).

Posted by Jerzy Ruzyllo at 03:44 PM | Semiconductors | Link

Sunday, December 15, 2013

#268 To scale or to go a different way?

Here is an interesting story related to my previous blog. It looks like the very benefits of transistor scaling down to low single digit nm gate length are questioned. Something that was bound to happen sooner or later finally came to haunt us - the cost rather than engineering is becoming a show stopper!

May be the time has come to consider a drastically different approach to transistor/circuit architecture as a problem solver? Such as for instance VeSFET/VeSTICs concept ? (see the blog#2.…)

Posted by Jerzy Ruzyllo at 03:32 PM | Semiconductors | Link

Sunday, December 8, 2013

#267 Down to 7 nm

Siting on the sidelines, I find it very interesting to follow over the years struggle of IC community with predictions of the evolution of digital ICs. Predictions, I might add, which quite often optimistically assume a success in working around barriers created by physics (which, actually, mostly do materialize). During my very early “semiconductor years” I distinctly remember 1 µm being considered to be almost insurmountable barrier in transistor scaling mainly due to the anticipated limits of photolithography. Some 25 years later, the very future of Si based CMOS below 22 nm gate length was questioned (see my comments in blog #103, Sept. 2, 2009). Incorrectly, because THE number is currently down to 7 nm which means that industry has a realistic plan with regard to how to get down to 7 nm gate length some 5-6 years from now. The number corresponds to about 35 silicon atoms which means that we will still have quite a few atoms to play with before we will really hit the bottom (good news is that “there is plenty of room at the bottom”, right?). But seriously, I share the opinion that before will get there, cost of the entire endeavor will force us to do things differently, i.e. we will have to find a different than transistor scaling path to ultra-low power logic.

Posted by Jerzy Ruzyllo at 09:01 PM | Semiconductors | Link

Saturday, November 30, 2013

#266 IEDM 2013

The 2013 edition of the IEEE International Electron Device Meeting, IEDM, will get underway in Washington D.C. starting Dec. 8. As it is  a trend-setting (in technical terms) meeting, checking on its technical program is an educational experience.

Posted by Jerzy Ruzyllo at 09:07 PM | Semiconductors | Link

Sunday, November 17, 2013

#265 Functional oxides

In semiconductor community dealing with semiconductor device operation, design and fabrication, term oxide is typically associated with silicon dioxide, SiO2. It plays a supportive role of the insulating, protecting, passivating or masking film in semiconductor devices (not only based on silicon, by the way). No semiconductor device can be fabricated or operate without an insulator layer being a part of it. However, in all situations, even with oxides acting as gate dielectrics in MOS/CMOS technology, oxide plays a passive role which means it is not performing any function that would require response of its physical properties to external influences such as electric or magnetic field, temperature, or pressure. Just to make it clear, an amorphous SiO2 we are dealing with in semiconductor technology is a small drop in the bucket of oxide materials science and engineering. Oxides, as a family of solids, display a wide variety of properties (electronics, ferroelectric, magnetic, superconducting to mention a few) which allow several key and unique applications. It is a nature of ionic, hence polar, interatomic bonds in many crystal oxides that is at the foundation of their unique characteristics. As far as mainstream semiconductor, transistor-type applications of functional oxide are concerned, you have to look no further than ZnO (see my early blog #55) to see what I have in mind.

Posted by Jerzy Ruzyllo at 11:02 AM | Semiconductors | Link

Sunday, November 10, 2013

#264 Energy harvesting - an elusive target

I always considered energy harvesting to be an elegant, if I may use this term, and with a great future, technical domain (see my blog #186 posted almost two years ago). The idea is to recover at least part of the energy wasted by us (for instance while walking), by cars (aerodynamics, friction, breaking, etc.), by incandescent bulbs (which emit much more heat which is completely wasted, than light), or by anything that vibrates, and then put it into a good use in autonomous, self-powered, electronic systems.

My enthusiasm regarding electronic systems which will operate based on the harvested energy, is not only because it is a great idea, but also because not much can be done in this emerging technical domain without semiconductors. Whether in the form of devices managing micro-power or micro-electro-mechanical (MEMS) sensors, semiconductors are at the core of any energy harvesting effort. Unfortunately, harvested micro energy needs to be somehow stored within autonomous electronic micro-system. And that’s the problem because storage of the energy harvested in such minute amounts is a real technical challenge. As a result, overall progress of energy harvesting effort is disappointingly slow. Sooner or later, though, it will switch to the overdrive because energy harvesting is a right thing to do.

Posted by Jerzy Ruzyllo at 07:11 PM | Semiconductors | Link

Thursday, October 31, 2013

#263 13th Intern. Symposium Semiconductor Cleaning Science and Technology, SCST 13

Fresh from the ECS symposium on Semiconductor Cleaning and Technology held this week in San Francisco, I would like to encourage you review papers presented during this symposium and included in the proceedings volume. Started in 1989 and held every other year, this symposium is still very well attended which testifies to the never decreasing role of surface processing in semiconductor device manufacturing.

Posted by Jerzy Ruzyllo at 08:42 PM | Semiconductors | Link

Saturday, October 26, 2013

#262 EUV - let's keep our fingers crossed

While the question when exactly it is going to happen remains unanswered the harsh reality is that the photolithography based on 193 nm exposure wavelength will have to be replaced with EUV (Extreme UV) lithography operating at 13.5 nm exposure wavelength (that is assuming the  progress in digital electronics will continue to depend on transistor scaling rather than on the development of innovative transistor/circuit architectures accomplishing desired performance advances at the geometries comfortably handled by 193 nm exposure tools).

It is a well-known fact that the transition to EUV lithography is hinging on the resolution of the myriad of technical challenges. The one I can relate to somewhat, and hence, appreciate a magnitude of the challenge, is a need to replace conventional transparent optics (lenses, masks, etc.) working so well down to 193 nm exposure wavelengths, with reflective optics. Simply speaking, there is no material transparent enough to 13.5 nm wavelength for transparent masks to work. The engineering behind the development of material systems that are 100% reflective and do not distorted in any way the reflected pattern at 13.5 nm wavelength is, let say, complex. Well, let’s keep our fingers crossed and $$$ flow freely….

Posted by Jerzy Ruzyllo at 07:37 PM | Semiconductors | Link

Sunday, October 20, 2013

#261 Electronics, photonics, spintronic, plasmonics...

A quick comment on various ".....nics". It is called for because, as my experience shows, the issue can be rather confusing and on occasion totally misinterpreted. So, here is a brief “…nics” story. No doubt grossly simplifying the problem, but hopefully serving good purpose.


Performance of technology driving logic integrated circuits is riding on the type of the carrier used to process information and distribute it on the chip. Logic systems, i.e. those carrying out computational operations, operate based on the binary system needed to code and process information which basically comes to switching the system from one state to another. In all that familiar electronics, electron and its charge serve this purpose and information is processed by turning flow of electrons (current) on and off. Tremendous advantage of electronics is that the device needed to perform switching, i.e. transistor, does not only exists, but also carries out its function with great efficiency.


Problem is that the electron, with losses it experiences moving through the solid, is not the optimal information carrier and sooner or later it will have to be replaced with “something”. What “something” will take over after the electron is a matter of discussion so profound that it creates technical domains in the process (see the title of this note). 


The most obvious replacement of the electron as an information carrier is photon, i.e. quantum of light (hence, photonics). Photon is by far more efficient than electron information carrier as it can cover distances in the waveguides, in contrast to electron pushing its way through semiconductor or metal, with very little losses. With short wavelength laser diodes and detectors available and optical waveguide technology well developed the missing link in this scenario is high-performance optical transistor, i.e. device in which light will be used to turn light “on” and “off”. Good progress in the development of an optical transistor is being made, but we still have a long way to go before optical integrated circuits were to become a commercial reality.


Different approach vigorously pursued is departing from the electron as a particle carrying electric charge. Instead, it exploits the fact that the intrinsic form of angular momentum carried by electron, in other words electron's spin, can be "directed" in the magnetic field only up or down. In the sense then, it represents an inherently binary "system" which spintronics attempt to exploit in a magnetically sensitive transistor, called simply a spin transistor, to perform logic functions. Based on the amount of effort and progress being made I have no doubt that sometime in the future not only electron’s charge, but also electron’s spin will be helping us satisfy our hunger for still better performing logic circuits.  


The farthest in terms of technical reality is a concept of plasmonics where plasmons rather than electrons, or photons, or electron spin will be employed to perform logic functions. The essence of a plasmon cannot be accurately explained without reaching to quantum physics. So, let's just say that it is an optically generated electron density wave propagating along a metal-dielectric interface. The surface plasmons caught attention of the logic IC community because they can propagate along the interface supporting frequencies well into 100THz (1014 Hz) range, and hence,  are considered for use in future generation chip-level interconnect networks (plasmonic waveguides). When forced into resonance, plasmons can also be potentially harnessed to carry our computational functions. For now it is a very, very long shot, however. First,
device in which plasmons will control propagation of plasmons, i.e. plasmonic "transistor" if want to stick to terminology we are familiar with, needs to be developed and the challenge is rather daunting.

You can take what you want from this longer than intended “....nics" story. As far as I am concerned, I bet on electronics to carry me through the end of my professional career. I will let others worry about what’s next.


P.S. Did you ever hear about “bioelectronics”? The story continues….

Posted by Jerzy Ruzyllo at 10:02 PM | Semiconductors | Link

‹‹ ›› is the personal blog of Jerzy Ruzyllo. With over 35 years of experience in academic research and teaching in the area of semiconductor engineering (currently holding position of a Distinguished Professor of Electrical Engineering and Professor of Materials Science and Engineering at Penn State University), he has a unique perspective on the developments in this progress driving technical domain and enjoys blogging about it.

With over 2000 terms defined and explained, Semiconductor Glossary is the most complete reference in the field of semiconductors on the market today.

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