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Sunday, September 5, 2021

#478 Lateral MIS Tunnel Transistor

 As discussed in the previous blog, MIS tunnel diode provides alternative to p-n junction and Schottky diode way of controlling current flowing across potential barrier built into bulk of semiconductor material or formed on its surface. And just like p-n junctions are at the core of Bipolar Junction Transistor (BJT) technology, and Schottky diodes are used to construct Metal-Semiconductor Field Effect Transistors (MESFET), MIS tunnel diodes can be also employed to form devices performing transistor functions. Unlike conventional MOSFET, however, MIS tunnel transistor is using both majority and minority carriers to operate, and thus falls into category of bipolar transistors.

 

MIS tunnel transistors were first considered by Schewchun and Clarke in early 1970’s as Surface Oxide Transistors (SOT).  Few years later, author of this blog in the paper published in IEEE Electron Device Letters suggested, under the name Lateral MIS Tunnel Transistor (LMISTT) alternative, lateral structure,  featuring all three contacts (two MIS tunnel diodes and the ohmic contact) on the top surface of silicon wafer, and was able to experimentally demonstrate its working. At that time, in the era of total focus of MOSFET/CMOS technology and no limits seen with regard to how far this technology can take us, this contribution went essentially unnoticed.

 

Here, I revive the concept of this particular transistor configuration because it may come handy in implementing transistors on new generation thin-film and nanoscale semiconductor materials both inorganic and organic, flexible or not, which some forty years ago were not even considered for any device applications.  Specifically, materials which (i) are not compatible with elevated temperature processing as to deposit LMISTT’s 2-3 nm thick layer of insulator low-temperature ALD can be used and no doping is required, (ii) are not compatible with standard photolithographic processes as micrometer scale LMISTT can be fabricated using mechanical masks with no wet steps involved, and (iii) do not form Schottky contacts with readily available metals which makes them incompatible with MESFET technology.

 

Feel free to contact me on LinkedIn if you would be interested in additional information regarding LMISTT.

 

Posted by Jerzy Ruzyllo at 08:29 PM | Semiconductors | Link



Semi1source.com/blog is a personal blog of Jerzy Ruzyllo. He is Distinguished Professor Emeritus in the Department of Electrical Engineering at Penn State University. With over forty years' experience in academic research and teaching in semiconductor engineering he has a unique perspective on the developments in this technical domain and enjoys blogging about it.




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