Based on the papers published in the January 1991 issue of IEEE Electron Device Letters it seems that the device research community at that time was increasingly interested in the effects potentially altering operation of the scaled down MOSFET such as those related to hot-carrier stress. Note that at that time term “deep-submicron” was used in reference to 38 micrometer technology and 11 nm was a thickness of gate oxide in advanced MOSFETs.

In the Solid-State Science and Technology section of the January 1991 issue of the Journal of the Electrochemical Society there are quite a few papers on the use of diffusion to dope silicon both single crystal and polycrystalline. And yes, there were also papers on the use of ion implantation, but not to dope silicon, but GaAs in which case doping by diffusion is not working because of temperature constraints. As far as doping of silicon is concerned, diffusion still remained as a dominant doping method at that time. As a matter of fact, in this very issue of JES there were two papers on the use of solid planar diffusion sources of phosphorous I happened to co-author.