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Sunday, February 21, 2016

#337 Vertical Slit FET, VeSFET

Among transistor architecures offering possible solutions to the future low-power, high-denisty and highly reconfigurable logic and memory ICs, Vertical Slit FET, or VeSFETcontinues to intrigue me because (i) it offers alternative to transistor scaling solution to the challenges of ultra-low power digital ICs and (ii) it very efficiently integrates transistors in the circuit with multi-level metallization scheme. Not to mention its predicted by several simulations superior performance in terms of, for instance, Ion/Ioff ratio.


It will be interesting to see what will be chip manufacturers reaction to this highly innovative solution.

Posted by Jerzy Ruzyllo at 12:26 PM | Semiconductors | Link is the personal blog of Jerzy Ruzyllo. With over 35 years of experience in academic research and teaching in the area of semiconductor engineering (currently holding position of a Distinguished Professor of Electrical Engineering and Professor of Materials Science and Engineering at Penn State University), he has a unique perspective on the developments in this progress driving technical domain and enjoys blogging about it.

With over 2000 terms defined and explained, Semiconductor Glossary is the most complete reference in the field of semiconductors on the market today.

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