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Sunday, May 7, 2017

#369 Bulk and the surface

Considering properties of semiconductor material in the form of the wafer for instance, it would be a mistake to consider it as a perfectly homogenous piece of the solid. In reality, distinction between its bulk and its surface needs to be made. That is because physical characteristics between these two parts of semiconductor material very significantly.   


In general terms, surface is an exterior face of the solid and represents two-dimensional termination of fundamental characteristics displayed by the three-dimensionally distributed atoms in the bulk of the sample. In the case of crystals, surface also represents an abrupt discontinuity of crystal structure. In contrast to the atoms in the bulk, atoms on the open surface have by definition at least one bond unsaturated. Such unsaturated (dangling) bonds at the surface are electrically active and unless neutralized these bonds will feature electric charge commonly referred to as surface states which will cause changes in the distribution of electric charge in the sub-surface region of semiconductor. Furthermore, atoms on the surface are the only ones that are exposed to and interacting with an ambient. Such interactions affect surface characteristics and induce their instabilities.


This is just a rough illustration of the reasons for which surface and bulk properties of semiconductor are drastically different. More on this, and related topics on the other occasion.


Posted by Jerzy Ruzyllo at 02:13 PM | Semiconductors | Link

Sunday, April 9, 2017

#368 Crystal defects

Considering complexity of the crystal structure of semiconductors an assumption that it consists of a perfectly periodic three-dimensional array of elemental cells, each featuring identical arrangement of atoms over the large volumes of crystal, is  unrealistic. 


Real crystals contain structural imperfections referred to as defects. The problem is that any departure from the lattice periodicity in the form of a defect has an adverse effect on electrical characteristics of material, and hence, the performance of devices based on such material. Some missing atoms here, some misplaced atoms there, combined with crystallographic planes in the crystal shifted with respect to each other may render semiconductor crystal unsuitable for device manufacturing. No wonder that defect engineering is a critically important part of semiconductor materials science and engineering.


Posted by Jerzy Ruzyllo at 08:30 PM | Semiconductors | Link

Sunday, April 2, 2017

#367 Crystal structure

As alluded to in the last two blogs, crystal structure of semiconductors plays an important role in defining their key physical characteristics, charge transport characteristics in particular.  Discussion of the crystal structure of solids is concerned with the way atoms comprising a solid are spatially distributed and bonded. An underlying consideration in this regard is the extent to which this distribution is ordered and the geometrical nature of the ensuing crystalline order. 


In terms of crystallographic order, two distinct classes of solids are represented by (i) crystals featuring periodic long-range order and (ii) non-crystalline materials, commonly referred to as amorphous materials in which, in contrast to crystals, atomic arrangement exhibits no periodicity or long-range order.  Among crystals, single-crystal and poly-crystalline/multicrystalline materials are distinguished.  In the former case, periodic long-range order is maintained throughout the entire piece of material while in the latter case such order is maintained only within the limited in volume grains which are randomly connected to form a solid.  As mentioned earlier, amorphous, non-crystalline materials do not feature a long-range order at all.


As it can be expected, amorphous semiconductors feature inferior charge transport characteristics as compare to their crystalline counterparts, single-crystal in particular.  On the other hand, being uniquely compatible with thin-film device technology amorphous semiconductors play key role in several important applications.  


Posted by Jerzy Ruzyllo at 04:11 PM | Semiconductors | Link

Sunday, March 12, 2017

#366 Velocity saturation

A brief comment related to previous blog on the mobility of charge carriers. Velocity of charge carriers moving in semiconductor under the influence of electric field increases with the increasing electric field, but then saturates at certain maximum value. Saturation occurs because of the excessive scattering of charge carriers drifting in semiconductor lattice with very high velocity enforced by the very high electric field.


Saturation velocity and electric field at which it is reached are material parameters which are different in different single-crystal semiconductors due to the different spatial distribution of atoms in the crystal lattice in different semiconductors. Interestingly, high saturation velocity does not have to coincide with high electron mobility featured by any given semiconductor. For instance, silicon (Si), featuring significantly lower electron mobility than gallium arsenide (GaAs), displays higher saturation velocity than the latter.


In general, values of saturation velocity and values of the electric field at which it saturates are very good predictors of the ability of semiconductor material to operate under the very high electric field. Keep in mind that the very high electric field in ultra-small geometry devices may occur at relatively low bias voltages.


Posted by Jerzy Ruzyllo at 10:49 AM | Semiconductors | Link

Sunday, March 5, 2017

#365 Charge carriers mobility

Mobility of electrons and holes is a key material parameter which pre-determines performance of any given semiconductor material in high-speed device applications. Sometimes the fact that the electron mobility is a material specific parameter, and hence, is different in different semiconductors does not seem to be fully recognized.


Free electrons and holes carrying an electric charge and moving in semiconductor material are subject to severe scattering resulting from collisions and electrostatic interactions with host and dopant atoms in the lattice. All these interactions come down to the material specific adjustments of the charge carriers movement in semiconductors which are collectively expressed by a single material parameter µ known as mobility (unit [cm2/Vs]) of electrons, µn, and mobility of holes, µp, in semiconductors. Depending on the composition of material and its crystal structure electron mobility may vary by orders of magnitude.  For instance, electron mobility at room temperature in silicon, Si, is 1500 cm2/Vs while in indium antimonide, InSb, about 80000 cm2/Vs.


Posted by Jerzy Ruzyllo at 11:26 AM | Semiconductors | Link

Sunday, February 19, 2017

#364 Why ternary and quaternary compounds?

The question is why bother with ternary (three elements) and quaternary (four elements) semiconductor compounds if binary III-V and II-VI compounds cover a brad range of bandgaps and lattice constants? The answer is that  by mixing and matching various binary  alloys continuous and  independent modifications of the energy band width and lattice constants of the end compound can be achieved.

Taking aluminum gallium arsenide (AlGaAs) as an example we can see that by changing Al fraction x in AlxGa1-xAs, material transitions from gallium arsenide GaAs (x = 0) to aluminum arsenide AlAs (x = 1) is taking place. In the process the bandgap of the compound changes from Eg = 1.42 eV to  Eg = 2.16 eV for AlAs with negligible changes in the lattice constant.  


In the case of II-VI compounds by alloying for instance CdTe and ZnTe into CdxZn(1-x)Te, or CZT, and changing its composition gradually by changing x the bandgap of the ternary alloy can be varied from 1.5 eV for x =1 to 2.2 eV for x = 0. Even finer tuning of the bandgap characteristics within similar range, but at the expense of more complex processing, can be accomplished by alloying two binary compounds into quaternary compound, e.g ZnSe and CdTe into quaternary compound Zn1-yCdySe1-xTex.


Posted by Jerzy Ruzyllo at 09:54 AM | Semiconductors | Link

Wednesday, February 8, 2017

#363 Semiconductor Glossary

In the case you would be interested in my "Semiconductor Glossary" in other than the hard copy version you may want to check its ebook and Kindle editions.

Posted by Jerzy Ruzyllo at 07:03 PM | Semiconductors | Link

Sunday, February 5, 2017

#362 More on tin...

Continuing on the comments on tin from two weeks ago here is a short verison of what I already said in blog #306.


 First, simulation and early experiments indicate that by forming a germanium-tin alloy, GeSn, with 3% of Sn added to Ge, a semiconductor which converts indirect bandgap of Ge into direct bandgap and increases hole mobility of Ge is formed.


Second, a single layer of tin atoms called stanene (from stannum and graphene) should feature, according to theoretical physicists, outstanding electrical conductivity around room temperature potentially making it a great interconnect material in future generation ICs.

Posted by Jerzy Ruzyllo at 04:00 PM | Semiconductors | Link

Sunday, January 22, 2017

#361 What’s wrong/good with tin?

Tin (Sn) is an element in group IV of the Periodic Table often referred to as “semiconductor group” for the reason that it includes elements displaying semiconductor properties. However, unlike other elements in group IV, notably carbon, (C), silicon (Si), and germanium (Ge), characteristics of tin are not conducive with the needs of semiconductor device technology. The two key reasons are an extremely narrow energy gap (effectively close to 0 eV) and its low melting point of 223 oC making tin hardly compatible with mainstream semiconductor device manufacturing practices. As the results tin is primarily used as solder.


While elemental thin in either bulk or thin-film form is not of use in semiconductor device technology, tin combined with other elements to form compounds as well tin in 2D (2-dimensional) form seem to display a number of potentially attractive characteristics. More about it next time…  


Posted by Jerzy Ruzyllo at 06:27 PM | Semiconductors | Link

Sunday, January 8, 2017

#360 "Vertical" is it.

Did you take note of the term “vertical” being recently a buzz word in semiconductors related discussions? After decades of dealing with  needed to keep  improving device/circuit performance downsizing of “horizontal” (or “lateral” if you want, or “planar” as some would say) geometries of integrated devices, we are getting serious about going vertical. Vertical transistor, vertical channel, vertical interconnect, vertical 3D integration are just few examples of this well-defined trend.


All this as a way to work around obvious constraints involving continued scaling down of horizontal dimensions. More importantly, however, as a way to keep on improving device/circuit performance without having to cope with technically challenging and very expensive issues involved in scaling lateral geometries to the single digit nanometers.

Posted by Jerzy Ruzyllo at 07:47 PM | Semiconductors | Link

‹‹ ›› is the personal blog of Jerzy Ruzyllo. With over 35 years of experience in academic research and teaching in the area of semiconductor engineering (currently holding position of a Distinguished Professor of Electrical Engineering and Professor of Materials Science and Engineering at Penn State University), he has a unique perspective on the developments in this progress driving technical domain and enjoys blogging about it.

With over 2000 terms defined and explained, Semiconductor Glossary is the most complete reference in the field of semiconductors on the market today.

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