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With over 2000 terms defined and explained, Semiconductor Glossary is the most complete reference in the field of semiconductors on the market today.


Including some 500 new terms defined and remaining terms updated and modified, a 2nd edition book version of this glossary is now available.

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Term (Index) Definition
p-n junction  p-type and n-type semiconductors are brought to contact in order to create a potential barrier; height of the potential barrier is controlled by the voltage applied between p- and n-type regions; in homojunctions p- and n-type regions are formed in the same semiconductor typically by locally changing its doping from p to n, or vice versa; in heterojunctions p- and n-type regions are made out of different semicodnuctors.
potential barrier  increased potential at the junction between two materials featuring different work function; e.g. p-type and n-type semiconductor (p-n junction) or metal-semiconductor contact (Schottky diode); there is an electric field present in the barrier region; the width of the potential barrier depends on the semiconductor doping; the height of potential barrier changes with applied bias voltage (reverse bias - high potential barrier, forward bias - low potential barrier) which makes junction to display diode-like current-voltage characteristics.
Term (Index) Definition
p-n junction isolation  isolation scheme used in bipolar ICs; n-type "island" in which n-p-n transistor is formed is surrounded by p-type material; reverse biased p-n junction formed provides isolation.
LOCOS  Local Oxidation of Silicon; isolation scheme commonly used in MOS/CMOS silicon technology; thick (in the range of 500 nm) pad of thermally grown SiO2 separates adjacent devices (e.g. PMOS and NMOS transistor in CMOS structure); local oxidation is accomplished by using silicon nitride, Si3N4, to prevent oxidation of Si in selected areas, hence, "local" oxidation; prior to SiO2 pad formation silicon in between Si3N4 covered regions is implanted to form "channel stop"; Si3N4 mask is etched off following thermal oxidation and MOSFETs are ten formed in the open spaces.
STI  Shallow Trench Isolation.
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Jerzy Ruzyllo is a Distinguished Professor Emeritus in the Department of Electrical Engineering at Penn State University.

This book gives a complete account of semiconductor engineering covering semiconductor properties, semiconductor materials, semiconductor devices and their uses, process technology, fabrication processes, and semiconductor materials and process characterization.

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Created and operated by J. Ruzyllo. Copyright J. Ruzyllo 2001-2016. All rights reserved.

Information in this glossary is provided at the author's discretion. Any liability based on, or related to the contents of this glossary is disclaimed.